
duowei_array:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <.init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <printf@plt+0x58>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <__libc_start_main@plt-0x20>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	90000090 	adrp	x16, 410000 <printf@plt+0xfb10>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <.text>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <printf@plt+0x40>
  40051c:	580000e3 	ldr	x3, 400538 <printf@plt+0x48>
  400520:	58000104 	ldr	x4, 400540 <printf@plt+0x50>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	004005fc 	.inst	0x004005fc ; undefined
  400534:	00000000 	.inst	0x00000000 ; undefined
  400538:	00400828 	.inst	0x00400828 ; undefined
  40053c:	00000000 	.inst	0x00000000 ; undefined
  400540:	004008a8 	.inst	0x004008a8 ; undefined
  400544:	00000000 	.inst	0x00000000 ; undefined
  400548:	90000080 	adrp	x0, 410000 <printf@plt+0xfb10>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <printf@plt+0x68>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined
  400560:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <printf@plt+0x98>  // b.none
  400578:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  40057c:	f9446421 	ldr	x1, [x1, #2248]
  400580:	b4000041 	cbz	x1, 400588 <printf@plt+0x98>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop
  400590:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <printf@plt+0xd4>
  4005b4:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x4c0>
  4005b8:	f9446842 	ldr	x2, [x2, #2256]
  4005bc:	b4000042 	cbz	x2, 4005c4 <printf@plt+0xd4>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	b0000093 	adrp	x19, 411000 <printf@plt+0x10b10>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <printf@plt+0xfc>
  4005e0:	97ffffe0 	bl	400560 <printf@plt+0x70>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret
  4005f8:	17ffffe6 	b	400590 <printf@plt+0xa0>
  4005fc:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400600:	910003fd 	mov	x29, sp
  400604:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400608:	9123e001 	add	x1, x0, #0x8f8
  40060c:	910043a0 	add	x0, x29, #0x10
  400610:	a9400c22 	ldp	x2, x3, [x1]
  400614:	a9000c02 	stp	x2, x3, [x0]
  400618:	a9410c22 	ldp	x2, x3, [x1, #16]
  40061c:	a9010c02 	stp	x2, x3, [x0, #16]
  400620:	a9420821 	ldp	x1, x2, [x1, #32]
  400624:	a9020801 	stp	x1, x2, [x0, #32]
  400628:	910043a0 	add	x0, x29, #0x10
  40062c:	52800061 	mov	w1, #0x3                   	// #3
  400630:	9400000e 	bl	400668 <printf@plt+0x178>
  400634:	910043a0 	add	x0, x29, #0x10
  400638:	52800061 	mov	w1, #0x3                   	// #3
  40063c:	94000032 	bl	400704 <printf@plt+0x214>
  400640:	910043a0 	add	x0, x29, #0x10
  400644:	52800061 	mov	w1, #0x3                   	// #3
  400648:	94000056 	bl	4007a0 <printf@plt+0x2b0>
  40064c:	2a0003e1 	mov	w1, w0
  400650:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400654:	91236000 	add	x0, x0, #0x8d8
  400658:	97ffffa6 	bl	4004f0 <printf@plt>
  40065c:	52800000 	mov	w0, #0x0                   	// #0
  400660:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400664:	d65f03c0 	ret
  400668:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40066c:	910003fd 	mov	x29, sp
  400670:	f9000fa0 	str	x0, [x29, #24]
  400674:	b90017a1 	str	w1, [x29, #20]
  400678:	b9002fbf 	str	wzr, [x29, #44]
  40067c:	1400001b 	b	4006e8 <printf@plt+0x1f8>
  400680:	b90027bf 	str	wzr, [x29, #36]
  400684:	b9002bbf 	str	wzr, [x29, #40]
  400688:	1400000d 	b	4006bc <printf@plt+0x1cc>
  40068c:	b9802fa0 	ldrsw	x0, [x29, #44]
  400690:	d37cec00 	lsl	x0, x0, #4
  400694:	f9400fa1 	ldr	x1, [x29, #24]
  400698:	8b000020 	add	x0, x1, x0
  40069c:	b9802ba1 	ldrsw	x1, [x29, #40]
  4006a0:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  4006a4:	b94027a1 	ldr	w1, [x29, #36]
  4006a8:	0b000020 	add	w0, w1, w0
  4006ac:	b90027a0 	str	w0, [x29, #36]
  4006b0:	b9402ba0 	ldr	w0, [x29, #40]
  4006b4:	11000400 	add	w0, w0, #0x1
  4006b8:	b9002ba0 	str	w0, [x29, #40]
  4006bc:	b9402ba0 	ldr	w0, [x29, #40]
  4006c0:	71000c1f 	cmp	w0, #0x3
  4006c4:	54fffe4d 	b.le	40068c <printf@plt+0x19c>
  4006c8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4006cc:	9124a000 	add	x0, x0, #0x928
  4006d0:	b94027a2 	ldr	w2, [x29, #36]
  4006d4:	b9402fa1 	ldr	w1, [x29, #44]
  4006d8:	97ffff86 	bl	4004f0 <printf@plt>
  4006dc:	b9402fa0 	ldr	w0, [x29, #44]
  4006e0:	11000400 	add	w0, w0, #0x1
  4006e4:	b9002fa0 	str	w0, [x29, #44]
  4006e8:	b9402fa1 	ldr	w1, [x29, #44]
  4006ec:	b94017a0 	ldr	w0, [x29, #20]
  4006f0:	6b00003f 	cmp	w1, w0
  4006f4:	54fffc6b 	b.lt	400680 <printf@plt+0x190>  // b.tstop
  4006f8:	d503201f 	nop
  4006fc:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400700:	d65f03c0 	ret
  400704:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400708:	910003fd 	mov	x29, sp
  40070c:	f9000fa0 	str	x0, [x29, #24]
  400710:	b90017a1 	str	w1, [x29, #20]
  400714:	b9002bbf 	str	wzr, [x29, #40]
  400718:	1400001c 	b	400788 <printf@plt+0x298>
  40071c:	b90027bf 	str	wzr, [x29, #36]
  400720:	b9002fbf 	str	wzr, [x29, #44]
  400724:	1400000d 	b	400758 <printf@plt+0x268>
  400728:	b9802fa0 	ldrsw	x0, [x29, #44]
  40072c:	d37cec00 	lsl	x0, x0, #4
  400730:	f9400fa1 	ldr	x1, [x29, #24]
  400734:	8b000020 	add	x0, x1, x0
  400738:	b9802ba1 	ldrsw	x1, [x29, #40]
  40073c:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  400740:	b94027a1 	ldr	w1, [x29, #36]
  400744:	0b000020 	add	w0, w1, w0
  400748:	b90027a0 	str	w0, [x29, #36]
  40074c:	b9402fa0 	ldr	w0, [x29, #44]
  400750:	11000400 	add	w0, w0, #0x1
  400754:	b9002fa0 	str	w0, [x29, #44]
  400758:	b9402fa1 	ldr	w1, [x29, #44]
  40075c:	b94017a0 	ldr	w0, [x29, #20]
  400760:	6b00003f 	cmp	w1, w0
  400764:	54fffe2b 	b.lt	400728 <printf@plt+0x238>  // b.tstop
  400768:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  40076c:	91250000 	add	x0, x0, #0x940
  400770:	b94027a2 	ldr	w2, [x29, #36]
  400774:	b9402ba1 	ldr	w1, [x29, #40]
  400778:	97ffff5e 	bl	4004f0 <printf@plt>
  40077c:	b9402ba0 	ldr	w0, [x29, #40]
  400780:	11000400 	add	w0, w0, #0x1
  400784:	b9002ba0 	str	w0, [x29, #40]
  400788:	b9402ba0 	ldr	w0, [x29, #40]
  40078c:	71000c1f 	cmp	w0, #0x3
  400790:	54fffc6d 	b.le	40071c <printf@plt+0x22c>
  400794:	d503201f 	nop
  400798:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40079c:	d65f03c0 	ret
  4007a0:	d10083ff 	sub	sp, sp, #0x20
  4007a4:	f90007e0 	str	x0, [sp, #8]
  4007a8:	b90007e1 	str	w1, [sp, #4]
  4007ac:	b90017ff 	str	wzr, [sp, #20]
  4007b0:	b9001fff 	str	wzr, [sp, #28]
  4007b4:	14000015 	b	400808 <printf@plt+0x318>
  4007b8:	b9001bff 	str	wzr, [sp, #24]
  4007bc:	1400000d 	b	4007f0 <printf@plt+0x300>
  4007c0:	b9801fe0 	ldrsw	x0, [sp, #28]
  4007c4:	d37cec00 	lsl	x0, x0, #4
  4007c8:	f94007e1 	ldr	x1, [sp, #8]
  4007cc:	8b000020 	add	x0, x1, x0
  4007d0:	b9801be1 	ldrsw	x1, [sp, #24]
  4007d4:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  4007d8:	b94017e1 	ldr	w1, [sp, #20]
  4007dc:	0b000020 	add	w0, w1, w0
  4007e0:	b90017e0 	str	w0, [sp, #20]
  4007e4:	b9401be0 	ldr	w0, [sp, #24]
  4007e8:	11000400 	add	w0, w0, #0x1
  4007ec:	b9001be0 	str	w0, [sp, #24]
  4007f0:	b9401be0 	ldr	w0, [sp, #24]
  4007f4:	71000c1f 	cmp	w0, #0x3
  4007f8:	54fffe4d 	b.le	4007c0 <printf@plt+0x2d0>
  4007fc:	b9401fe0 	ldr	w0, [sp, #28]
  400800:	11000400 	add	w0, w0, #0x1
  400804:	b9001fe0 	str	w0, [sp, #28]
  400808:	b9401fe1 	ldr	w1, [sp, #28]
  40080c:	b94007e0 	ldr	w0, [sp, #4]
  400810:	6b00003f 	cmp	w1, w0
  400814:	54fffd2b 	b.lt	4007b8 <printf@plt+0x2c8>  // b.tstop
  400818:	b94017e0 	ldr	w0, [sp, #20]
  40081c:	910083ff 	add	sp, sp, #0x20
  400820:	d65f03c0 	ret
  400824:	00000000 	.inst	0x00000000 ; undefined
  400828:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40082c:	910003fd 	mov	x29, sp
  400830:	a901d7f4 	stp	x20, x21, [sp, #24]
  400834:	90000094 	adrp	x20, 410000 <printf@plt+0xfb10>
  400838:	90000095 	adrp	x21, 410000 <printf@plt+0xfb10>
  40083c:	91374294 	add	x20, x20, #0xdd0
  400840:	913722b5 	add	x21, x21, #0xdc8
  400844:	a902dff6 	stp	x22, x23, [sp, #40]
  400848:	cb150294 	sub	x20, x20, x21
  40084c:	f9001ff8 	str	x24, [sp, #56]
  400850:	2a0003f6 	mov	w22, w0
  400854:	aa0103f7 	mov	x23, x1
  400858:	9343fe94 	asr	x20, x20, #3
  40085c:	aa0203f8 	mov	x24, x2
  400860:	97ffff08 	bl	400480 <__libc_start_main@plt-0x40>
  400864:	b4000194 	cbz	x20, 400894 <printf@plt+0x3a4>
  400868:	f9000bb3 	str	x19, [x29, #16]
  40086c:	d2800013 	mov	x19, #0x0                   	// #0
  400870:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400874:	aa1803e2 	mov	x2, x24
  400878:	aa1703e1 	mov	x1, x23
  40087c:	2a1603e0 	mov	w0, w22
  400880:	91000673 	add	x19, x19, #0x1
  400884:	d63f0060 	blr	x3
  400888:	eb13029f 	cmp	x20, x19
  40088c:	54ffff21 	b.ne	400870 <printf@plt+0x380>  // b.any
  400890:	f9400bb3 	ldr	x19, [x29, #16]
  400894:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400898:	a942dff6 	ldp	x22, x23, [sp, #40]
  40089c:	f9401ff8 	ldr	x24, [sp, #56]
  4008a0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4008a4:	d65f03c0 	ret
  4008a8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004008ac <.fini>:
  4008ac:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4008b0:	910003fd 	mov	x29, sp
  4008b4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4008b8:	d65f03c0 	ret
